IBM has unveiled what it calls the world's first sub-1-nanometer chip technology — a transistor architecture at the 0.7nm (7-angstrom) node — marking a milestone for an industry bumping up against the physical limits of shrinking chips.
The breakthrough's deeper significance is a change of direction. For decades, making chips more powerful meant shrinking their transistors sideways, but at this scale the physics fights back. IBM's answer is to stop going smaller and start going up — building transistors in three dimensions rather than two. What it showed on June 25 is a laboratory demonstration that the path below 1nm exists; it is not, yet, a product.
The new chip packs nearly 100 billion transistors onto a piece of silicon the size of a fingernail, almost double the density of the 2nm chip IBM unveiled in 2021, which had been the smallest node in the world until now. IBM, which announced the breakthrough on June 25 from its Yorktown Heights, New York headquarters, says the chip delivers up to 50% more performance or up to 70% greater energy efficiency than its 2nm chips — gains it expects to benefit generative AI, cloud infrastructure, and next-generation devices. IBM projects production in as little as five years.
To read more, click here.